Analog switch, a switch that uses the characteristics of JFET or MOS to achieve control of signal paths, is mainly used to complete the switching function of signal link connection or disconnection. It is widely used in various automatic control systems and electronic digital products because of its low power consumption, high speed, no mechanical contact, small size and long service life.
The structure of a conventional CMOS process analog switch is shown in Figure 1. Connecting NMOS in parallel with PMOS allows the signal to pass equally smoothly in both directions. The gate is used to control the on and off of the switch. NMOS conducts when Vgs is positive and cuts off when Vgs is negative, while PMOS does the opposite. The different characteristics of PMOS and NMOS result in a switch with the characteristics shown in the figure below.
The amount of signal current carried between NMOS and PMOS is determined by the input to output voltage ratio. Since there is no selection of the current flow in the switch, there is no distinction between the input and output sides. The CMOS switch benefits from rail-to-rail dynamic range, bi-directional operation, and on-state resistance that remains constant as the input voltage changes.
Static parameters (on-resistance, leakage current, logic-controlled trigger level): ① on-resistance RON, difference in on-resistance of different channels RON, flatness of on-resistance RFLAT(ON).
The on-resistance causes a loss in signal, especially when the switch is connected in series with a low-impedance load. The switch with the appropriate on-resistance should be selected for the application. In particular, it is important to note that the resistance of the on-resistance is directly related to the supply voltage, and usually the higher the supply voltage, the lower the on-resistance.
NMOS tubes have a lower on-resistance when the signal is low, while PMOS tubes have a lower on-resistance when the input signal is high, and when the two resistors are connected in parallel, they are lower in the whole effective range of the signal.
Leakage Current: An ideal state of the switch requires the on-state resistance to be zero, the on-state resistance tends to be infinite in the disconnected state, and the leakage current is zero; but in fact the switch is disconnected for the high resistance state, the leakage current is not zero, the conventional CMOS leakage current is about 1nA.
When the switch is disconnected, the leakage current will flow into the load, thus causing additional errors. If the signal source has a high internal resistance and the transmitted signal is a direct flow, it is especially necessary to consider the leakage current of the analog switch, and it is generally desired that the leakage current is as small as possible.
Note that if the impedance of the front-end circuit through the analog switch is large, the impact of leakage current cannot be ignored, and if the impedance of the front-end circuit is small, the impact of the on-resistance will be greater.
The logic control trigger level VIH, VIL. VIH can be recognized by the analog switch as the minimum value of the logic high level; VIL can be recognized by the analog switch as the maximum voltage value of the logic low level.
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