In the world of computer chips, many parameters are "bigger is better." Such as more cores, higher GHz frequency, and greater floating-point computing capabilities. The difference is that in terms of craftsmanship, the entire industry is struggling to move towards even smaller goals. From 10nm to 7nm, up to 5nm and smaller. But before delving into the reasons, we need to review the processor architecture and how engineers plan and design chips.
Now the front: This article mainly describes how computer chips are physically assembled, and the photolithography part involved in manufacturing is briefly passed.
In the chip industry, feature size is closely related to process nodes. For details, refer to the third chapter of How to Design a CPU.
Each execution unit inside the chip can complete mathematical operations and data storage, and its performance is quite dependent on the efficiency of the process node (specifically every iteration of the same manufacturer).
However, in marketing practice, the term is used quite loosely, depending on the minimum or average value between transistors that the manufacturer prefers.
In the processor world, no change will happen overnight. Larger components mean that it takes longer to change their state, signals need longer propagation time, and need to consume more energy, not to mention that large chips will take up more physical space.
The picture above shows Intel's three old CPUs. The far left is Celeron in 2006, the Pentium mobile processor in 2004 is in the middle, and the old collapsed processor in 1995 is at the far right.
The process nodes of the three chips are 65, 90, and 350 nm, which are products of 24 years ago. The key components are five times the size of products of 13 years ago.
At the same time, newer CPUs have about 290 million transistors inside, while the old collapses are only one percent (a little over 3 million). In terms of power consumption, the TDP of the 2006 Celeron processor is about 30W, and the old Pentium is only 12W.
The increase in thermal design power consumption is mainly due to the flow of electrical energy around the circuit in the chip, and energy is lost due to various processes, and most of it is released in the form of heat. Although 30W is several times larger than 12W, the transistors of the new CPU are nearly a hundred times larger than those of the old chip.
Because of this, using smaller process nodes can make the chip smaller, switch transistors faster, increase the amount of operations per second, and reduce the dissipation of energy (heat).
So, why don't we "step in place" and let all chips use the smallest process directly? Speaking of which, we need to mention the production process called "lithography".
Photomasks block light in certain areas, and the light that is allowed to penetrate is concentrated on a small point, and then reacts with special layers used in chip manufacturing to determine the location of individual parts.
You can imagine taking an X-ray picture of your arm, the bones blocked the light (acting as a mask), and the muscle tissue allows X-rays to penetrate, resulting in an image of the internal structure. The iteration of the photolithography process is related to the wavelength of light.
Visible light (380 ~ 750 nm) is only part of the spectrum. Others include radio waves, microwaves, and X-rays. You can see the size of the light wave in the picture above, which is about 10 ^ -7 meters (about 0.000004 inches).
Closer to home, we continue to talk about the chip manufacturing process. For example, the old Celeron used a 65nm process node. So how do we make parts smaller than light waves? The answer is to use ultraviolet (EV) or even extreme ultraviolet lithography (EUV).
In the spectrogram, UV starts at about 380nm and ends at about 10nm. Manufacturers such as Intel, TSMC, and Grofont have now touched extreme ultraviolet (around 190 nm).
The new process can not only make the component itself smaller, but also the overall quality may be better, so that the components are tightly packed together, which helps reduce the overall size of the chip.
Different companies have different claims about the scale of process nodes. For example, Intel uses P1274 to refer to the current 10nm process, and TSMC calls it 10FF.
After selling Grofont, AMD now relies on TSMC's foundry and uses a 7nm mass production process. It should be pointed out that although some of the smallest features have a span of only 6nm, most other features are slightly larger than this.
In order for ordinary people to understand how small 6nm is, it must be mentioned that the diameter of the silicon atoms themselves is about 0.1nm, and the spacing of most of the silicon atoms constituting the processor body is only 0.5nm. In other words, a single transistor covers less than 10 silicon atoms in every aspect.
Despite the incredible facts, EUV lithography has caused many serious engineering and manufacturing challenges. Intel has been working hard to make its 10nm production capacity catch up with the 14nm level, and Grofont has stopped the development of 7nm and below processes last year.
The problem is that as the electromagnetic wavelength becomes shorter and shorter, the energy it carries becomes larger and larger, leading to a greater potential to damage the chip being manufactured. In addition, small-scale manufacturing is highly sensitive to contamination and defects in the materials used.
Other issues include diffraction limits and statistical noise (the natural variation in the energy delivered by EUV waves deposited into the chip layer), which prevents manufacturers from achieving 100% perfect chip manufacturing goals.
Another problem is that in the weird atomic world, we can no longer assume that the transfer of current and energy will follow the rules of classical physical systems. When moving electronics, you will encounter more difficult problems.
As far as Intel and TSMC are concerned, it will become more difficult to achieve this goal, because the thickness of the insulation layer is not enough. However, the current production problems are almost all focused on the inherent defects of EUV lithography technology.
Because of this, we have to wait for many years before we can judge whether the quantum processing scheme is more advantageous. In addition, for commercial reasons, smaller processes can save even more costs.
If Intel uses the 28nm process to manufacture Haswell series CPUs (such as i7-4790K), its cost will double. But by cutting more chips on a single wafer, the extra cost can be largely offset.
In the past few years, the application of chips represented by smartphones and home / cars has shown an almost exponential growth. Chip makers are also forced to bear the financial losses caused by the shift to smaller process nodes, until the industry supporting large-scale mass production is more mature.
Although Grofont's abandonment sounds a bit pessimistic, Samsung and TSMC's input / output in the 7nm process is still somewhat gratifying. For example, AMD ’s latest three-generation Ryzen CPUs have given the market a boost.
This series of high-end PC processors uses TSMC's 7nm process and combines 14nm chips produced by Grofonder. The former can be regarded as a traditional CPU component, while the latter is an SoC bridge component integrating DDR4 memory controller and PCI Express 4.0.
The figure above shows Intel's process node changes over the past 50 years, with X-axis from 10 to 10000 nm and Y-axis from 1970 to 2020. On the whole, the chip giant iterates about every 4.5 years.
If all goes well, it is expected to launch a 5nm product line in 2025 (hope that 10nm production capacity will not be hindered). At the same time, Samsung and TSMC are also actively investing in 5nm research, hoping that the industry can continue to surprise consumers.
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